141 lines
5.9 KiB
Text
141 lines
5.9 KiB
Text
--------------------------------------------------------------------------------
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Running performance on file test\p2B_deffer_impl_flat_d.ps
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-------------------- NV40 --------------------
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Target: GeForce 6800 Ultra (NV40) :: Unified Compiler: v65.04
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IPU0 ------ Simplified schedule: --------
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Pass | Unit | uOp | PC: Op
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-----+--------+------+-------------------------
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1 | SCT0 | div | 0: TEXh h0, f[TEX0], TEX1;
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| TEX | tex | 0: TEXh h0, f[TEX0], TEX1;
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| SCB0 | dp4 | 1: DP4h h1.x, h0, const.xxxx;
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| SCB1 | nop | 1: DP4h h1.x, h0, const.xxxx;
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| | |
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2 | SCT0/1 | div | 3: DIVh h1, h0, h1;
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| SCB1 | mul | 4: MOVh h6.w, const.---x;
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| | |
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3 | SCT0 | div | 6: TEXh h0.yzw, f[TEX5], TEX6;
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| TEX | tex | 6: TEXh h0.yzw, f[TEX5], TEX6;
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| SCB0 | add | 7: ADDh h2.xyz, h0.wzy-, const.xxx-;
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4 | SCT0 | div | 9: TEXh h0.yzw, f[TEX5], TEX7;
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| TEX | tex | 9: TEXh h0.yzw, f[TEX5], TEX7;
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| SCB0 | add | 10: ADDh h0.xyz, h0.wzy-, const.xxx-;
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5 | SCT0 | mul | 12: MULh h0.xyz, h0, h1.yyy-;
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| SCB0 | mad | 13: MADh h4.xyz, h2, h1.xxx-, h0;
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6 | SCT0 | div | 14: TEXh h0.yzw, f[TEX5], TEX9;
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| TEX | tex | 14: TEXh h0.yzw, f[TEX5], TEX9;
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| SCB0 | add | 15: ADDh h2.xyz, h0.wzy-, const.xxx-;
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7 | SCT0 | div | 17: TEXh h0.yzw, f[TEX5], TEX8;
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| TEX | tex | 17: TEXh h0.yzw, f[TEX5], TEX8;
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| SCB0 | add | 18: ADDh h3.xyz, h0.wzy-, const.xxx-;
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| SCB1 | mul | 20: MOVh h0.w, const;
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8 | SCT0 | mul | 22: MADh h3.xyz, h3, h1.zzz-, h4;
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| SCB0 | mad | 22: MADh h3.xyz, h3, h1.zzz-, h4;
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9 | SCT0 | div | 23: TEXh h0.xyz, f[TEX5], TEX3;
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| TEX | tex | 23: TEXh h0.xyz, f[TEX5], TEX3;
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| SCB0 | mad | 24: MADh h2.xyz, h2, h1.www-, h3;
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10 | SCT0 | div | 25: TEXh h3.xyz, f[TEX5], TEX2;
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| TEX | tex | 25: TEXh h3.xyz, f[TEX5], TEX2;
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| SCB0 | mul | 26: MULh h0.xyz, h0, h1.yyy-;
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11 | SCT0/1 | div | 27: MOVr r3.xzw, f[TEX2].x-yz;
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| SCB0 | mad | 29: MADh h3.xyz, h3, h1.xxx-, h0;
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| SCB1 | mul | 28: MULh/2 h2.w, h2.---z, r3;
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12 | SCT0 | div | 30: TEXh h0.xyz, f[TEX5], TEX4;
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| TEX | tex | 30: TEXh h0.xyz, f[TEX5], TEX4;
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| SCB0 | mad | 31: MADh h1.xyz, h0, h1.zzz-, h3;
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13 | SCT0 | mul | 32: MULh h3.xyz, h2, const.xxy-;
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| SCB1 | mul | 34: MULr r3.w, h2.---x, r3.---x;
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14 | SCT0 | div | 35: TEXh h0.xyz, f[TEX5], TEX5;
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| TEX | tex | 35: TEXh h0.xyz, f[TEX5], TEX5;
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| SCB0 | mad | 36: MADh h0.xyz, h0, h1.www-, h1;
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15 | SCT0 | div | 37: DP3h h4.y, f[TEX3], h3;
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| SCB0 | dp3 | 37: DP3h h4.y, f[TEX3], h3;
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| SCB1 | mad | 38: MADr h3.w, r3.---z, h2.---y, r3;
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16 | SCT0 | div | 39: DP3h h4.z, f[TEX4], h3;
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| SCB0 | dp3 | 39: DP3h h4.z, f[TEX4], h3;
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17 | SCT0 | div | 40: TEXh h1, f[TEX0], TEX0;
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| TEX | tex | 40: TEXh h1, f[TEX0], TEX0;
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| SCB0 | add | 41: ADDh h4.x, h2.w---, h3.w---;
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| SCB1 | mul | 42: MOVh h4.w, h1;
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18 | SCT1 | mov | 43: NRMh h4.xyz, h4;
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| SRB | nrm | 43: NRMh h4.xyz, h4;
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| SCB0 | mul | 44: MULh*2 h6.xyz, h1, h0;
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19 | SCT0 | div | 45: MADh h0.xyz, h4, const.xxx-, f[TEX1];
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| SCB0 | mad | 45: MADh h0.xyz, h4, const.xxx-, f[TEX1];
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Pass SCT TEX SCB
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1: 50% 100% 100%
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2: 100% 0% 25%
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3: 50% 100% 75%
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4: 50% 100% 75%
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5: 75% 0% 75%
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6: 50% 100% 75%
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7: 50% 100% 100%
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8: 75% 0% 75%
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9: 50% 100% 75%
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10: 50% 100% 75%
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11: 75% 0% 100%
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12: 50% 100% 75%
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13: 75% 0% 25%
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14: 50% 100% 75%
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15: 75% 0% 75%
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16: 75% 0% 75%
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17: 50% 100% 50%
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18: 0% 0% 75%
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19: 75% 0% 75%
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20: 0% 0% 0%
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MEAN: 56% 50% 68%
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Pass SCT0 SCT1 TEX SCB0 SCB1
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1: 100% 0% 100% 100% 100%
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2: 100% 100% 0% 0% 100%
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3: 100% 0% 100% 100% 0%
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4: 100% 0% 100% 100% 0%
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5: 100% 0% 0% 100% 0%
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6: 100% 0% 100% 100% 0%
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7: 100% 0% 100% 100% 100%
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8: 100% 0% 0% 100% 0%
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9: 100% 0% 100% 100% 0%
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10: 100% 0% 100% 100% 0%
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11: 100% 100% 0% 100% 100%
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12: 100% 0% 100% 100% 0%
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13: 100% 0% 0% 0% 100%
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14: 100% 0% 100% 100% 0%
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15: 100% 0% 0% 100% 0%
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16: 100% 0% 0% 100% 0%
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17: 100% 0% 100% 100% 100%
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18: 0% 0% 0% 100% 0%
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19: 100% 0% 0% 100% 0%
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20: 0% 0% 0% 0% 0%
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MEAN: 90% 10% 50% 85% 30%
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Cycles: 20.00 :: R Regs Used: 4 :: R Regs Max Index (0 based): 3
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--------------------------------------------------------------------------------
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Running performance on file test\p2b_deffer_impl_flat_d.ps
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-------------------- NV40 --------------------
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Target: GeForce 6800 Ultra (NV40) :: Unified Compiler: v81.95
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Cycles: 19.00 :: R Regs Used: 4 :: R Regs Max Index (0 based): 3
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Pixel throughput (assuming 1 cycle texture lookup) 336.84 MP/s
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--------------------------------------------------------------------------------
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Running performance on file test\p2b_deffer_impl_flat_d.ps
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-------------------- G70 --------------------
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Target: GeForce 7800 GT (G70) :: Unified Compiler: v81.95
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Cycles: 18.00 :: R Regs Used: 4 :: R Regs Max Index (0 based): 3
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Pixel throughput (assuming 1 cycle texture lookup) 533.33 MP/s
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